RF and Analog Layout Design for state-of-the-art process technologies. 

We specialize in full and semi-custom high-speed RF and Analog layout design employing device matching and minimization of electro-migration, IR drop, and parasitic elements. Our experience gained over the years has lead to our specializing in full and semi-custom backend design and procedures.


.: Process technology experience :.
TSMC CMOS 65nm and up -- including specialty processes
UMC .13um CMOS
Jazz .18um BiCMOS and SiGe

.: Tools :.
Cadence Virtuoso/XL and Cadence Chip Assembly Router
Mentor Graphics design tools
Calibre, Checkmate, and Cadence Dracula for verification.

Experienced floorplanning, layout design, and high productivity is provided in the latest process technologies for the major foundries. Tool expertise is mainly in the Cadence VIrtuosoXL environment for layout of cells, blocks and critical circuitry. For lower speed, digital control signals, Cadence Chip Assembly Router can be employed to shorten design time if needed. Experience entails layout design in all areas of the chip. Layout design of IO pads and rings, all the way inward to major layout blocks, up to the Chip level planning and routing.